I went through this exact bring-up (same board, jumper-wired to a Pi) and hit several landmines past the point where this thread leaves off — posting them here since this thread is where the error message search lands.
On the pinout: the schematic (WI-FI_HALOW_FGH100M_EXT01_V30) is the only reliable authority for which D-pad is which — multimeter probing misidentifies RESET as INT (both have ESD diode signatures). The full pad map, plus three things that will bite after CMD63 starts passing, is in the writeup I just posted: PSA: Seeed XIAO HaLow (FGH100M-H): enumerates fine, RX fine, TX dead? Wire the 5V pad (VDD_FEM)
The short version for anyone stuck here:
- R15 is a 10K pulldown on RESET_N — the chip is held in reset by default. The driver has to actively drive reset high (
gpio_direction_output(reset_pin, 1)inhw.c), not release it to input; on a Pi the SoC’s default pull-down wins otherwise. - Keep SPI at 4 MHz on jumper wires. After soldering we ramped to 40 MHz clean; 50 MHz (the driver default) never inits on hand wiring.
- The big one: once SPI works, if the chip enumerates and RX is fine but no peer can see your TX — the board needs the 5V pad wired (VDD_FEM, the TX PA rail), not just 3V3. Nothing documents this. Details and the diagnostic signature at the link above.