MM8108-MF15457 + ESP32-C5, SPI mode 2 @ 5 MHz. Chip ID reads 0x0809 (MM8108B2). CMD52 read and write work on FN1 and FN2 — including writing/reading back a test pattern at 0x80100000. CMD53 reads work. CMD53 writes always return data-response token 0xEB, and large writes leave the module unresponsive until hard reset.
Eliminated: CRC over data / token+data, init 0 / 0xFFFF, both CRC byte orders, burst vs byte-wise vs full-duplex transmission, FN1 and FN2 FBR block size, all four SPI modes, 1–5 MHz, MOSI idle state.
Note: mode 0 (per your SPI Troubleshooting FAQ) gives a consistent one-bit sampling misalignment on this hardware; only mode 2 produces valid responses.
What causes the MM8108 to reject the CMD53 write data phase while accepting CMD52 writes to the same address?
A post was merged into an existing topic: MM8108-MF15457 + XIAO ESP32-C5, SPI transport, two custom PCBs — chip-ID read fails with DATA_TIMEOUT after startup passes